Changelog
2026
v0.15.22026-06-26
Added
- **VHDL Formatter** —
Shift+Alt+F(Format Document) now indents VHDL files correctly #45 - Line-based state machine indentation for: entity, architecture, process, if/elsif, case/when, for loops, generate, comments
- Configurable via
vhdl.formatter.indentSizeandvhdl.formatter.insertSpaces - 18 unit tests covering all constructs
v0.15.12026-06-25
Added
- **Rename Provider** —
F2(Rename Symbol) now works on VHDL entity names, architecture names, signal names, port names, and variable names. Renaming an entity declaration also renames all its instantiations, and vice-versa #40
Changed
- Bumped dev dependencies (
@types/node,typescript-eslint,serialize-javascript,@vscode/test-cli)
v0.15.02026-06-19
Added
- **Fit Resource Summary** — after a Quartus build, the QSF Tree View now displays a live **Fit Summary** section parsed from
<project>.fit.summary. Each resource (logic elements, pins, registers, PLLs, memory bits, etc.) is shown with color-coded usage: - 🟢 Green — below 70%
- 🟡 Orange — 70%–90%
- 🔴 Red — ≥90%
- Summary entries are sorted by usage descending (most critical first), and the parent node shows
$(pass)/$(error)depending on Fitter status - Automatic watcher on
*.fit.summaryfiles — the tree view refreshes as soon as Quartus finishes a build
Changed
- Landing page and README screenshot gallery — "Build output" replaced with "Fit Resource Summary"
v0.14.52026-06-19
Added
- Signature help for VHDL entity instantiations — when typing inside a
port map(...), VS Code now shows the entity's port names and types as you type #21 - Quick Fix for undeclared identifiers —
Ctrl+.on an undeclared identifier offers to declare it as asignalin the architecture body
Changed
- Entity completion now triggers only after typing
work.prefix instead of on bare entity/component/architecture/end keywords, reducing noise in autocompletion
v0.14.42026-06-18
Added
- Find All References provider for VHDL — right-click any symbol (signal, variable, constant, port, entity, etc.) and pick **Find All References** for cross-file navigation #21
Fixed
- False positive "Undeclared identifier" on
afterkeyword - Syntax linter now correctly detects
beginon the same line asprocess - QSF lint not firing — language ID corrected from
qsftoquartus; linter now runs on open editor as well - Port lint no longer flags commented-out port declarations
parseSignalsnow skips declarations inside VHDL comments- Function completion (
rising_edge/falling_edgeetc.) now works with partial prefix — changed fromstartsWithtoincludes
Changed
- Moved build scripts (
esbuild.js,.vscode-test.mjs) toscripts/directory - Moved
opencode.jsoncto.opencode/directory
v0.14.32026-06-17
Added
- Hierarchical VHDL Outline — process symbols now contain local
variable/constantdeclarations as children - Function and procedure symbols in packages now show their parameters as children in the Outline
- Entity symbols now use the **Class** (orange diamond) icon instead of
{}braces - Entity instantiations (
label : entity work.xxx) now also use the **Class** icon for consistency - Outline screenshot in documentation
Fixed
- False positive "Undeclared identifier" and missing unused-signal warnings for comma-separated declarations (
signal a, b : std_logic;) — both names are now recognized
v0.14.22026-06-17
Fixed
- False positive "Undeclared identifier" on identifiers after
guardedkeyword (e.g.q <= guarded d;) - False positive "Undeclared identifier" on loop label after
end loop(e.g.end loop loop_label;)
v0.14.12026-06-17
Added
- Syntax highlighting for alias declaration names (pattern
alias <name> is)
Fixed
- False positive "Undeclared identifier 'alias'" on alias declarations (
alias name is target) - False positive "Missing ';'" / "'end' without matching scope" on context declarations (
context name is ... end context name) - False positive "Undeclared identifier" on alias target and context name identifiers in
undeclaredIdentifierLint - Missing syntax highlighting for
aliasandcontextkeywords
v0.14.02026-06-16
Added
- VitePress documentation site at https://guizzz.github.io/VHDL-Essentials/ with full guide, features, troubleshooting, and configuration pages #58
- GitHub Actions deploy workflow for automatic Pages publishing on push to master #61
- Custom dark theme (#0f0f23 background, #4fc3f7 cyan accent) with VitePress branding throughout #62
- SVG logo with sine/square wave oscilloscope design, 5-pin symmetrical layout, rounded corners
- Screenshot gallery on landing page (2×2 grid with hover glow) showing key features: pin diagnostics, build output, code actions, entity navigation
- Hero image layout: extension screenshot displayed next to title in the VitePress hero section
- Simplified README (~100 lines) with docs badge, link to VitePress site, and cleaned-up feature listing
Changed
- Extension icon (
resources/icon.png) resynchronised with the new SVG logo design docs/public/screenshots/build_2.pngoptimised (107 KB → 34 KB)
Removed
resources/screen/directory (duplicate screenshot location — all assets now live underdocs/public/screenshots/)
v0.13.22026-06-12
Added
- Cross-file package symbol resolution for undeclared identifier lint — symbols exported by a
packagein any open file are resolved via theEntityIndexer, eliminating false positives for identifiers consumed viause work.pkg.all#71 - IEEE and Synopsys function keywords (
to_signed,to_unsigned,resize,conv_integer,conv_std_logic_vector,shift_left,shift_right, etc.) added to VHDL keywords whitelist — no more spurious undeclared-identifier errors for common numeric_std routines #72
Fixed
- Quartus compile output channel is cleared before each simulation run, so stale messages from previous runs are no longer visible
- Non-error messages from Quartus compile diagnostics (
info/warningseverity) are skipped when generating editor diagnostics — they remain visible in the output channel but no longer produce squiggly underlines infoseverity added toQuartusCompileErrortype for proper severity categorization
v0.13.12026-06-11
Fixed
parseQuartusErrore test cross-platform: rilevamento path assoluti Windows su CI Linux tramite regexWIN_ABS_RE, normalizzazione separator backslash/forward-slash, confronti path indipendenti dalla piattaforma nei test
v0.13.02026-06-10
Added
- VHDL Document Symbols (Outline) —
Ctrl+Shift+Oshows file structure: entities with ports/generics, architectures with signals/constants/types/processes/component declarations/entity instantiations/component instantiations, packages with symbols #20 - Compilation error navigation — quartus build errors parsed from
msg_tcl_post_messageand rawError (NNNN):format; squiggly underlines on source lines in VHDL files; Ctrl+clickable paths in the output channel #44 - Live transcript output —
vsimstdout piped in real time to a dedicated'Questa Transcript'LogOutputChannel #35
Fixed
runQuartusTasknow returns aPromise<number | null>that resolves only on processcloseevent —await runQuartusTask()reliably waits for build completion before proceeding- File path resolution in compile errors: uses
RelativePattern(projectDir, '**/*.vhd')pre-build scan to build abasename → full pathmap for instant lookups duringparseChunk
Changed
- Build/flash output channel converted to
LogOutputChannel— native severity-aware coloring via.info()/.warn()/.error()instead of ANSI escape codes (more reliable on Windows)
v0.12.42026-06-09
Added
- Undeclared identifier detection — identifiers used but not declared are flagged as errors; recognizes signals, variables, constants, entity ports, generics, types, subtypes, enumeration literals, package names, and for-loop variables #64
- Go to Definition for entity-local signals, variables, and constants —
Ctrl+Clickjumps from usage to declaration inside the architecture body #69
Fixed
- Undeclared identifier linter: false positives for time units (
us,ms, etc.), severity levels (failure,note,warning), hex/binary literal prefixes (x",b",o"), identifiers inside string literals, and package declaration names - Unused-signal linter: no longer flags package-scoped declarations (consumed cross-file via
use work.pkg.all) #70
Documentation
- README updated with undeclared identifier detection, Go to Definition for local signals, and updated Code Actions table
v0.12.32026-06-08
Added
- Code Actions (Quick Fixes) for all lint diagnostics — press
Alt+Enteron any warning to apply automatic fixes: missing/extra ports in port map, duplicate declarations, unused signals, sensitivity list corrections, QSF duplicates, missing semicolons, wrongendkeywords, unclosed scopes,else/elsif/whenwrapping, package body stubs, and unassigned port stubs #43 - Shared
VHDL_KEYWORDSconstant extracted tosrc/utils/vhdlKeywords.ts— both sensitivity and unused-signal linters now import from one place #67 - Centralized
offsetToPosition()utility insrc/utils/positionUtils.ts— used by duplicate-signal, port-map, and unused-signal linters #66 - 400ms debounce on
TodoCommentLinterto avoid redundant validation on rapid edits #65 - Unused signal/variable/constant lint: warns when a declaration is never used; unused names are grayed out (40% opacity) for visual feedback; declarations inside VHDL comments (
-- signal foo...) are correctly ignored - TODO comment markers tracking: scans for
TODO,FIXME,HACK,XXX, andNOTEinside VHDL comments — shown as Info diagnostics in the Problems panel with gold (#FFD700) highlighting parseSignalsoffset now points to variable/signal name instead of declaration keyword (fixes range placement)
Fixed
findUnusedSignals: signal names are now regex-escaped before building the search pattern, preventing crashes if a signal name contained regex-special characters #68- Bare
endwithout trailing space (e.g.,endalone on a line) is now correctly recognized as a scope terminator — no more spuriousUnclosed architecturediagnostic fixPortmapMissingPortcode action: scans forward from entity line tracking paren depth, appends comma to last mapping, and inserts new mapping with correct indent alignment (no stray;at wrong position)findUnusedSignals: restored originaloffsetToLine+ forward-walk column calculation that correctly handles CRLF (\r\n) line endings; removed buggylineStartsbinary-search approach
Documentation
- Added Code Actions feature section with autofix screenshot to README
- Updated README with unused declarations & TODO markers sections
- All screenshots now use uniform
<img width="600">for consistent layout
v0.12.12026-06-05
Added
- Port map validation: missing ports and undeclared formals detected in direct entity instantiations (
label : entity work.xxx) #39 - 108 new unit tests across port map parser, port map linter, entity parser, and regression tests
Fixed
offsetToPositionwith CRLF files: replacedsplit(/\r?\n/)with substring +split('\n')to avoid 1-char/line accumulation error that placed diagnostics on wrong lines #39parseMappingsno longer splits on commas inside VHDL commentsfindBalancedParennow skips VHDL comments during parenthesis counting- Entity declaration offset now points to entity name, not the
entitykeyword - EntityIndexer O(n²) → O(n) bug in file removal
- Various code quality: translated Italian comments to English, improved error handler, hover ordering, CI step ordering
v0.12.02026-06-05
Added
- VHDL auto-completion: ~80 keywords, local symbols (signals/variables/constants/ports), entities, package names, and package symbols; context-aware (entity/component/architecture context shows only entities) #57
- Pin assignment tree items now have a blue
plugicon and left-click opens.qsfat the pin's line #36 - Improved entity context detection — works with labels like
spi_master_out : entity work.fa
v0.11.02026-06-05
Added
- 33 VHDL code snippets:
entity,arch,pkg,pkgb,process,proc_nr,proc_comb,fsm,inst,comp,tb,clock,stim,sig,sigv,var,const,type,subtype,case,for,if,func,proc,func_decl,proc_decl,forg,ifg,cnt,sr,others,wait,assert#37 - Package body completeness lint — warns when a function/procedure is declared in a package but not implemented in its body
- demo/ project with source VHD files and testbench (for development and testing)
- 58 unit tests across 7 test files for parsers, hover icons, and real-world VHDL #25
Fixed
- Context menu commands now accept serialized
vscode.Urifrom tree view items; auto-matches selected file without QuickPick; robust path extraction withfsPath/resourceUri.fsPath#36 isTestBench()no longer flags entities with own ports +port mapas testbenches — requires entity with no ports to be considered a testbenchvariableParsernow skipscomponent ... end componentblocks to avoid false duplicate port declarationssyntaxLint.checkSemicolonskipslabel : namepattern (component instantiation continuation) to avoid false positiveMissing ;syntaxLint.tryOpenScopeforfunction/procedure: if line ends with;and nois→ declaration only, does not open a scope
v0.10.32026-06-04
Added
- Sensitivity list lint: checks that all read signals are in
process(...)sensitivity lists for combinatorial processes, and that clock/reset signals used inrising_edge()/falling_edge()are listed for synchronous processes #42 - Skips
process (all)(VHDL-2008) and processes without sensitivity lists - Hint for unnecessary signals in sensitivity list displayed directly on the variable name with
DiagnosticTag.Unnecessary
Fixed
checkSemicolonnow handles comma-separated port declarations likey, q : out std_logic— no more false "Missing ';'"port(...)regex now correctly matches types with parentheses likestd_logic_vector(N-1 downto 0)#55- Syntax linter no longer produces false "Missing ';'" on generics type keywords (
positive,natural,integer, etc.) and multi-lineassert/report/severityblocks #56
v0.10.02026-06-03
Added
- Real-time VHDL syntax checking — validates scopes (
if/end if,process/end process,for...loop/end loop, etc.), missing semicolons, wrong loop termination (end whileinstead ofend loop), and strayendkeywords #38 - Diagnostics appear in the Problems panel with 400ms debounce — no configuration needed
Documentation
- Updated README with syntax checking feature section and screenshot
v0.9.12026-06-03
Fixed
Refactored
- Consolidated duplicate file watchers in
qsfViewService: replaced redundantcreateFileSystemWatcher+ workspace event listeners with a single watcher usingonDidCreate/onDidChange/onDidDelete#16 - Split
quartusLogger.tsintologger/folder: output channel management, task lifecycle, and TCL output parsing are now in separate modules - Extracted tree node classes (
PinAssignmentsNode,TestBenchesNode,QuestaScriptsNode) fromqsfTabProvider.tsinto dedicatedtreeNodes.ts#17
v0.9.02026-06-02
Added
- Added duplicate pin and signal assignment detection for QSF files
- Same
PIN_xxassigned to multiple signals → Error diagnostic - Same signal assigned to multiple pins → Warning diagnostic
Fixed
- Replaced
anytype withPinAssignmentinterface in QSF tab provider
Changed
- Renamed
buildStatus→taskStatusandstartBuild→startTaskin runner and status bar - Enabled strict TypeScript flags and resolved unused variables
- Translated remaining Italian comments to English
v0.8.42026-05-29
Changed
- Rebranded extension from Quartus Assistant to VHDL Essentials
v0.8.32026-05-29
Improved
- Improved source parsing for local declarations inside architectures and processes.
- Added support for port direction visualization (
in,out,inout,buffer) in hover information. - Enhanced IntelliSense foundations for future navigation and symbol indexing features.
Feature
- Added semantic hover support for VHDL variables, signals, constants and entity ports.
- Hover tooltips now display symbol kind, type information and declaration preview.
- Added contextual hover rendering with syntax-highlighted VHDL code blocks. 
v0.8.22026-05-28
Fixed
- Fixed VHDL syntax highlighting not working in packaged
.vsixbuilds - Resolved missing grammar and language configuration files during extension packaging
- Moved
syntaxes/outsidesrc/to avoid.vscodeignoreexclusion issues
v0.8.12026-05-28
Fixed
- Fixed VSCode engine compatibility mismatch during extension build.
- Aligned
@types/vscodeversion with the declaredengines.vscoderequirement.
v0.8.02026-05-28
Feature
- Added native VHDL syntax highlighting support directly inside Quartus Assistant.
- The extension is now fully independent from external VHDL syntax extensions such as
Modern VHDL. - Added semantic highlighting for: * VHDL keywords and control statements * arithmetic, logical and assignment operators * entities, architectures, packages and components * signals, variables, constants and ports * process labels and instance labels * VHDL built-in functions and attributes * numeric literals and radix formats * time units (
fs,ps,ns,us,ms, ...) * boolean literals (true,false) * parentheses and brackets - Added custom TextMate grammar for VHDL source files.
- Improved readability and editing experience for large VHDL projects.
v0.7.02026-05-27
v0.6.12026-05-27
Feature
- VHDL packages are now automatically discovered and indexed across the workspace.
- Added **Go to Definition** support for VHDL packages.
- You can now
Ctrl+Clickon package references declared with: ``vhdl use work.<package>.all;`and jump directly to the corresponding package declaration. * Added **Go to Definition** support for symbols declared inside VHDL packages. * You can now navigate to declarations of: * constants * types * subtypes * signals * functions * procedures imported through:`vhdl use work.<package>.all;`` * Added semantic highlighting for: * package references * package symbols imported from workspace packages
v0.6.02026-05-26
Feature
- Added **Go to Definition** support for VHDL entity instantiations.
- You can now
Ctrl+Clickon entities instantiated with: ``vhdl entity work.<name>`` and jump directly to the corresponding entity declaration in the workspace. - Added semantic highlighting for VHDL entities.
- Entity names are highlighted only when a valid declaration exists in the workspace index.
- Introduced automatic indexing of VHDL entities (
.vhd,.vhdl). - The index is updated automatically when: * VHDL files are saved * files are created * files are deleted
v0.5.32026-05-26
Improved
- Generate
.dofiles directly by clicking a testbench in the panel view - Prompt user before overwriting existing
.dofiles
v0.5.12026-05-22
Fixed
- Minor fix of v0.5.0
v0.5.02026-05-22
Improved
- Improved TreeView display using workspace-relative paths instead of absolute paths
- Improved VHDL top-level entity parsing and lookup
- Refactored simulation execution logic for reusable command-based invocation
- Improved cross-platform file path handling using
fsPath - Improved extension stability when launching detached QuestaSim GUI processes
Feature
- Added integrated QuestaSim
.dolauncher - Added QuickPick selection for simulation scripts
- Added automatic QuestaSim GUI startup from VS Code
- Added support for launching simulations directly from the Quartus Assistant view
- Added automatic workspace-relative
.dofile discovery - Added top-level entity source file detection from VHDL entity declarations
- Added project-aware simulation execution using workspace root as working directory
v0.4.22026-05-21
Improved
- When generting .do now add only testbench waves
v0.4.12026-05-20
Fixed
- Fix order of dependencies auto imported on .do file
v0.4.02026-05-20
Feature
- New command implemented: "Generate QuestaSim .do" file
- Auto search into project if there are testbench files
- Auto search for dependencies of the test bench
- Auto-Generation of .do file ready to be executed on questasim
v0.3.22026-05-19
Feature
- Implemented new parser for top level entity ports
- Implemented lint warning on top level entity port that are missing on .qsf
- Implemented syntax highlighting for questasim .do files
v0.3.12026-05-18
Improved
- Improved logger, now stamp better info of the Error
v0.3.02026-05-15
v0.2.02026-05-14
Fixed
- Fixed duplicated output channels on multiple builds
- Fixed output panel not automatically opening during tasks
- Fixed inconsistent status bar updates
- Fixed project visibility refresh after workspace changes
Improved
- Refactored extension architecture into modular components
- Improved command separation and maintainability
- Improved Quartus process handling
- Improved status bar management
- Improved logging system reliability
- Improved workspace event handling
- Improved extension scalability for future features
v0.1.02026-05-08
Added
- Compile Quartus projects directly from VS Code
- Flash CPLDs from inside the editor
- Support for
.qpfand.qsffiles - Syntax highlighting for Quartus project files
First public release